Delay Characterization of Combinational Modules by Functional Arrival Time Analysis

A combinational module is a combinational circuit that can be used under any arrival time condition. In 8] we showed that exact false-path-aware delay characterization of a com-binational module can be reduced to functional required time analysis 6] of the module. This reduction makes it possible to detect false paths of a combinational module without assuming any speciic arrival time condition at the primary inputs. The delay characteristics of the module are represented by a delay abstraction, which contains eeective delay between each input-output pair under each input vector applied to the module. In this paper we approach the same problem using functional arrival time analysis of the module under an arrival time condition chosen arbitrarily. We prove that if a path sensitization condition is chosen properly, the resulting delay abstraction is a conservative approximation to the exact delay abstraction computed by functional required time analysis regardless of the choice of the arrival time condition. The relationship between the accuracy of delay abstractions computed in this approach and path sen-sitization conditions used in the underlying functional arrival time analysis is clariied. 1 Introduction The goal of this paper is to compute a false-path-aware delay abstraction of a combinational module by performing functional arrival time analysis of the module. A delay abstraction is a compact representation of the delay information of the module, which carries pin-to-pin delay for each primary-input/primary-output pair. The delay can be dependent on input vectors provided to the module. The existence of false paths is captured in the delay abstraction by keeping eeective pin-to-pin delays instead of topological delays. The internal structural details of the module are abstracted away. The major diiculty in computing a false-path-aware delay abstraction of a combinational module is in the requirement that a delay abstraction be valid and accurate under any arrival time condition at the inputs. State-of-the-art path sensitization conditions (e.g. viability 9], oating-mode 4] and XBD0 10]) exploit arrival times at primary inputs to enable accurate false path detection. Therefore, a direct application of those path sensitization conditions does not seem appropriate in this context since we cannot assume speciic arrival times. In 8, 7] we showed that the exact delay abstraction of a module can be computed under the XBD0 model 10] without assuming any arrival time condition. Speciically, the problem was shown to be reducible to functional required time analysis 6]. The approach taken in this paper is …